高层次综合里程牌文献

张开发
• 2026/4/11 1:06:09 • 15 分钟阅读

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高层次综合里程牌文献
《An Efficient and Versatile Scheduling Algorithm Based on SDC Formulation》《SDC-based modulo scheduling for pipeline synthesis》《High-Level Synthesis for FPGAs: From Prototyping to Deployment》《RapidStream: Parallel Physical Implementation of FPGA HLS Designs》《TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design》《AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs》《Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency》《Bit-level optimization for high-level synthesis and FPGA-based acceleration》《Behavior and communication co-optimization for systems with sequential communication media》《High-Level Power Estimation and Low-Power Design Space Exploration for FPGAs》《Architecture-level synthesis for automatic interconnect pipelining》《Improving Polyhedral Code Generation for High-Level Synthesis》《Platform-based resource binding using a distributed register-file》

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